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- 8 analog differential isochronous inputs protected at ± 40V
- Vin = ±10VFS levels (G = 1)
- one 16-bit ADC, max speed: 4Msamples/s/channel
- Software-programmable gains on each analog input G = 1 ; 2 ; 4 ; 8
- 15 decimation ratios with anti-aliasing protection
- 1 programmable digital filter per channel
- High accuracy and low drift ( 2 x 10 -5)
- IRIG B or TRIGGER input for time-stamping (Master / Slave)
- Time resolution of 1µs with PLL
- Multi-board, multi-rack sync. (PXI)
- FLIP-FLOP memory ( 2 x 64 Msamples)
or ONE SHOT (128Msamples)
- External pre- and post-trigger
- CPCI / PXI Master / Slave (bus exchanges)
- Drivers for Windows NT, XP and Linux 2.6 supplied and supported .
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Designed for very high speed acquisitions, the CPCI 1224 board provides 16-bit analog / digital conversions up to 4Msamples/s over 8 simultaneous channels. Each analog input features:
- one instrumentation amplifier with software-programmable gain (1; 2; 4; 8) (protection ± 40V)
- one 16-bit ADC up to 4Msamples/s.
- one 128-sample programmable digital filter
The CPCI 1224 takes advantage of the PXI concept for channel and rack synchronization. Time-sampling is performed through an IRIG B input followed by a synchronized oscillator which ensures a 1-µs resolution. The CPCI 1224 features:
- one 2K-word measurement-descriptor table (with subsampling capacity)
- one 256Mbyte large buffer for the SD RAM (16 Mega acquisitions per channel) in either "One Shot" or
"Flip / Flop" mode.
The board may be Master of Slave over the CPCI / PXI bus to ensure high data rates for real-time environments (64Mbytes/s).
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9 rue Georges Besse – BP 47 – 78330 FONTENAY LE FLEURY – FRANCE Tél.:(33) 1 30 58 90 09 fax:(33) 1 30 58 21 33 http://www.adas.fr |
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SPECIFICATIONS |
(t = 25°C) |
TYPE |
SIMULTANEOUS SAMPLING 8 ANALOG INPUTS |
ANALOG INPUTS |
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- Number of channels |
8 differential |
INSTRUMENTATION AMPLIFIER |
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- Software programmable gain per channel |
1 ; 2 ; 4 ; 8 |
- Input impedance |
1MΩ diff / 500kΩ SE |
- Signal range |
± 10V FS |
- Over voltage protection |
± 40V (with or without supplies) |
- Input current |
± 30nA |
- Input offset voltage |
≤ ± (200 + 600/G) µV |
- Offset drift |
≤ ± 1,7µV/°C (G = 10) |
- Gain error |
≤ ± 0,05 % of FS " G |
- Gain drift |
≤ 10ppm/°C |
- Non linearity |
≤ ± 0,006 % FS |
- CMRR |
≥ 80dB (DC to 100kHz) |
- Settling Time (10V step) |
200ns |
- Slew rate |
100V / µs |
- Attenuation at 1MHz (10Vpp) |
< 0,02dB |
- Noise |
2,5µVpp (0,1Hz to 10Hz) |
ADCs |
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- Type |
16-bit SAR with SH (zero latency) |
- Speed |
4M Samples/S (250ns) |
- NMC at 4MSPS |
16 bits |
- INL |
± 2 LSB max |
- DNL |
± 1 LSB max 16-bit no missing codes |
- SFDR |
90dB min |
- SNR (100kHz) |
88dB typical |
- THD |
- 98dB @ 100KHz |
- Interchannel skew |
5ns |
NUMERICAL FILTERING |
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- Type |
FIR (Finite Impulse Response) |
- Order |
63 |
- Selection |
With or without filter by software |
- Cut off frequency |
Programmable from Fd/50 to Fd/2,5 |
- Attenuation at twice cut frequency |
≥ 60dB |
- Transition slope |
≥ 160dB/octave |
- Bandwidth ripple |
≤ 0,05dB of DC at 0,7 Fc |
DATING |
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- Type |
Analog IRIG B composite input or TTL external start trigger |
- Coupling |
Master / Slave boards with synchro via trigger |
- High time resolution |
PLL with IRIG synchro for 1µs resolution dating |
- Acquisition frequency |
4MHz max |
- Number of internal timers |
2 |
- Timers Resolution |
16 bits |
- RTSI |
3 TRIGGER lines |
MEMORIES |
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- Scanning table |
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2048 channels 64K patterns |
- Memories measurement |
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FLIP-FLOP or ONE SHOT 2 x 64Msamples or 1 x 128Msamples |
MODE |
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- Flip Flop |
2 x alternate 64Msamples buffers |
- One shot |
1 x 128Msamples buffer |
- Pre-post Trigger |
1/ Start in Flip-Flop mode without transfer |
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2/ Trigger (Trigger address memorization) |
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3/ One shot mode for a define buffer |
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4/ Stop (Master DMA transfer or wait for slave transfer) |
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CPCI INTERFACE |
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- PCI |
Master / Slave 32 bits/33MHz |
- PXI |
TRIGGER & TRIGSTAR |
- Transfer |
Flip Flop (sustained 64Mbytes/s Master Mode) |
POWER SUPPLY |
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- Voltage |
+ 5V / 3A ; + 3,3V / 1A |
PHYSICAL CHARACTERISTICS |
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- Format |
3U / 4Te CPCI FORM FACTOR |
- Front panel connectors |
1 sub D 25 Female for analog Inputs |
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1 x LEMO for IRIG B & TRIGGER (Input / Output) |
- LEDS |
1 x Acquisition 1 x active Master 1 x Access board |
ENVIRONMENT |
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- Range - Operating temperature - Storage temperature - Relative humidity - Vibrations - Chocs |
Industrial - 25°C / + 70 °C - 40°C / + 85 °C 90 % (without condensation) 20 Hz - 2000Hz - 4g 25g - 6ms |
EUROPEAN NORMS |
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EMC - EN 61326 CE Compliance ROHS - 2002/95/EC | |
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